union _AMD64_MXCSR_REG// Size=0x4
{
    unsigned long Value;// Offset=0x0 Size=0x4
    unsigned long IE:1;// Offset=0x0 Size=0x4 BitOffset=0x0 BitSize=0x1
    unsigned long DE:1;// Offset=0x0 Size=0x4 BitOffset=0x1 BitSize=0x1
    unsigned long ZE:1;// Offset=0x0 Size=0x4 BitOffset=0x2 BitSize=0x1
    unsigned long OE:1;// Offset=0x0 Size=0x4 BitOffset=0x3 BitSize=0x1
    unsigned long UE:1;// Offset=0x0 Size=0x4 BitOffset=0x4 BitSize=0x1
    unsigned long PE:1;// Offset=0x0 Size=0x4 BitOffset=0x5 BitSize=0x1
    unsigned long DAZ:1;// Offset=0x0 Size=0x4 BitOffset=0x6 BitSize=0x1
    unsigned long IM:1;// Offset=0x0 Size=0x4 BitOffset=0x7 BitSize=0x1
    unsigned long DM:1;// Offset=0x0 Size=0x4 BitOffset=0x8 BitSize=0x1
    unsigned long ZM:1;// Offset=0x0 Size=0x4 BitOffset=0x9 BitSize=0x1
    unsigned long OM:1;// Offset=0x0 Size=0x4 BitOffset=0xa BitSize=0x1
    unsigned long UM:1;// Offset=0x0 Size=0x4 BitOffset=0xb BitSize=0x1
    unsigned long PM:1;// Offset=0x0 Size=0x4 BitOffset=0xc BitSize=0x1
    unsigned long RC:2;// Offset=0x0 Size=0x4 BitOffset=0xd BitSize=0x2
    unsigned long FZ:1;// Offset=0x0 Size=0x4 BitOffset=0xf BitSize=0x1
    unsigned long res:16;// Offset=0x0 Size=0x4 BitOffset=0x10 BitSize=0x10
};